% dmgr &
You may see two windows in the Design Manager. The left one shows all
of the Mentor tools installed in our system, and the right one shows all
of the design objects under your working director $MGC_WD. Activate
the tools window, and open Design Architect by double clicking on the design_arch
icon.
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Create the circuit using schematic editor in Design Architect. You
may refer to Module 2, Getting Start with Design Architect
to learn how to use schematic editor. Use the pull-down menu Help>open
Tutorial to first open the on-line helper Bold Browser, then select
the training book.
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Click on the Open Sheet icon on the session palette. And enter component
name: $CLASS/op_amp1 in the dialog box.
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Select the pull-down menu Libraries>MGC Analog Library. Click on
the Generic_parts on the right pallet. Then all of the
components in Generic_lib are shown. Select the current source
and resistance from the palette window and place them in the
schematic window.
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Select the pull-down menu Libraries>MDK Library. Click on the
SDL parts on the right pallet. Then select the nmos,
pmos, portin and portout from the palette window and place them
in the schematic window.
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In the right palette window, hold on the right mouse button and select
the Display Schematic Palette item in the popup menu to go back
to the main menu. Click on the ADD WIRE icon to connect the parts
in the editor window as the figure on shows. You may need to move some
parts to proper positions.
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After you connect the symbols, Unselect all and select the portins
and portouts. Select the popup menu Properties>Change Text Values...
and enter Vi1, Vi2 and Vo1, Vo2 as net names in the
dialog box. Then click on the portins name NETs to change
them to Vi1, Vi2 and click on the portouts name NETs
to change them to Vo1, Vo2.
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you need to modify their property values by selecting the pop-up menu Property>Modify...
or Modify Multiple.... Change the values of the current source
to 5 micro ampere. Change the physical feature of PMOS transistors
to 4 lambda length and 250 lambda width, which will correspond
to 1.6 micron and 100 micron, respectively, in 0.8 micron
process. Change the physical feature of the NMOS transistor to 4
lambda length and 250 lambda width. Note that the bulk terminals
of the transistors should be connected to VDD (for PMOS) and VSS
(for NMOS).

figure 1 : the schematic of op-amp1

figure 2 : the schematic of op_amp2
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Check your sheet by clicking the pull-down menu Check>Sheet. If
there are any errors, correct them and check again.
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Save your sheet. File>Save Sheet. And finish the op_amp2
as the figure 2. Close the Design Architecture window.