News
Well folks, I have officially
been married a little over a month now and things are going extremely
well. I have also found a job
in the Shreve, OH area which is turning out nicely as well. With
all that going on, I have still had time to make quite a bit of
progress on the thesis. I have the concept motherboard wire-wrapped
and it tested out perfectly, so now work continues on the I/O
modules to see how they function. After spending some time thinking
what would be the best way to do the Counter
Input Module, I finally settled on the idea of using a PIC16C710
instead of discrete logic. The package was small and the price
was right, so I thought "Why not?" Once that hurdle
was completed, I decided to alter my original thinking on the
Analog Input Modules.
The A/D's were around $5.00 each and there was a slight chance
that they might be in the middle of updating their outputs when
the motherboard latches capture the data. Additional logic could
be added to eliminate this possibility, but this module already
has the largest part density so that was not a desirable option.
The alternative to this scenario is to use a PIC16C710 and utilize
the internal A/D. The removes the need to include correctional
logic, and it also gives the added bonus of using simple digital
filtering to remove unwanted noise before it enters the system.
The software for both the A/D and the counter modules have been
compiled, tested, and work flawlessly. If you would have asked
me last year that I would be designing a multi-processor system
I would have said you were nuts. I guess that goes to show how
much progress has been made.
Today, I finished up the
user interface enclosure construction. This is the point where
I wish I had a digital camera so I could snap some photos for
you to view. It actually turned out quite well. Internally there
are only about 6 wire-wrapped connections, so I think I will just
use this as the final production piece rather than take the time
to layout a PCB and rebuild it. I have started work on the code
to interface with the keypad and have already made pretty good
progress. I have key debouncing completed as well as code that
identifies if a key has been held and to repeat the key stroke
until released. Tomorrow I will be starting into the code that
determines what state the system is in and what keys are valid
in each state. Once that is completed, I can pretty much put the
system through its paces and see how it performs. Things are going
well so far! By the way, only 9 more days until I join the ranks
of husbands everywhere. ;)
Lots has happened since
the last update to be sure. It will suffice for now to say that
things are rolling right along! First off is the hardware. I have
the 2 megs of external SRAM installed and functioning properly.
Well, actually for some reason the compiler only recognizes it
as 1 meg instead of 2, so that is a bit of an issue. I will continue
to pursue an answer in that department, but I've focused the meat
of my work on finishing the secondary CPU card and its attached
peripherals. I have tested the fiber-optic links that will be
between the secondary CPU card and the motherboards. To simplify
the design, I'm going to have three motherboards that will be
designated 'Bank A', 'Bank B', and 'Bank C'. The first two will
each hold 32 input modules and the last one will hold 32 output
modules. Hopefully this combined with separate power supplies
will help reduce the potential noise interaction between the modules.
I have also built the LCD portion of the hand held user interface
(UI). Instead of using a PIA, I opted to find a bit more elegant
solution. I came up with utilizing a Serial LCD Interface (SLI).
Essentially, I communicate with a transmit only 9600 baud serial
line to the SLI. The SLI in turn is attached directly to the back
of the LCD and converts the serial data stream to E clocked 8
bit instructions the LCD can understand. When the SLI unit receives
power, it automatically initializes the LCD and awaits the first
character to be sent. This allows me to reduce the data lines
sent to the UI and also removes the need to monitor for the UI's
presence. Unfortunately, to transmit two rows of 20 characters
takes quite a while (43.2 mS). I changed my coding technique to
place the LCD update routine in a lower priority interrupt reducing
its CPU utilization down to 2%. Lastly, I was able to get the
QSPI update portion of the code functioning. It is responsible
for streaming the data over the fiber-optic lines. The port has
impressed me and is running reliably at 2Mbaud. From initial tests,
I have concluded that not only will it sample all 96 I/O modules
at 128 times per second, it can also store each of those to the
2 meg of SDRAM at the same rate. There is now good news and bad
news concerning this. The good news is, even at this fast sampling
and storage rate, it only uses 49% of the CPU. The bad news is
that with only 2 megs of storage, it will be filled in under a
minute. There is a bright side to this, namely that most of the
time all 96 modules will never all be storing at 128 times a second.
I have no plans to be adding a 20 Gig Ultra SCSI-2 hard drive
any time soon. I have also made some major changes to the layout
of the site which you can see by just browsing around. For now
though, I'm back to programming the PC code in Visual Basic.
A lot of the news in the
past here has been focused on the hardware aspect of the project,
but this is only half of the design. Software needs to be written
to enable the embedded processor to function correctly. Also,
Windows based software needs to be completed to give the user
a GUI in which to view and manipulate the downloaded data from
the car. The first parts of this next phase are coming into place.
The software for the embedded CPU card has been completed to the
point that it boots and executes a timed interrupt which toggles
a chip select line. I can put a logic probe on the chip select
line and visually see the levels changing at a regular interval,
so one of the harder steps has been completed. I've flow charted
some of the fundamental routines in the embedded source code and
placed them on the page. Eventually I plan to have all the code
charted out so folks can review how the system functions.
Yes, I have finally got
on the ball and done something with the www page. I've updated
my resume and put it online for all to see. A week or so ago,
the first batch of parts have arrived so construction can finally
begin. I expect to spend my spring break doing this as well as
prepare for my wedding. Oh, I guess I haven't mentioned that here
yet. I proposed on Jan. 30th and it was met with great joy so
you can't complain with that! The date has been set to Aug. 21st
so let the planning begin. But I digress... The module designs
have been finalized and set in stone. Motherboard schematics are
being finished up and will be solidified by early spring quarter.
Expect great things to occur here as June nears.
All of the module circuits
that are known are now updated and described fairly well. I've
also included the pricing on each portion of the circuit. Please
keep in mind that the prices are assuming that parts are being
bought on a low volume. Once approved and all parts can be bought
at once, the price should drop around 30% or so. I purposely chose
values that were common to values used in other modules to help
lower the cost as well. I'm sure there are plenty of spelling
and grammatical errors, but that's how it goes. I'll clean it
up tomorrow. Due to popular request, I've softened up the background
image so it's not so obnoxious. Gotta love that. And finally,
I have added a weather link to show local radar and forecasts
for Athens, Ohio. We all know we are the center of the universe.
I'm outta here to complete my homework.
I've edited most of the
schematics to reflect the changes to the circuits. I still have
a few to clean up and modify to complete the transition. I also
have changed the flow diagrams to show generic power lines instead
of using specific values which I will explain in the near future.
I'm currently working on an alternative power isolation scheme
other than a DC-DC converter. I can filter out one fairly well,
but when there is a string of 32 in a box, I can see the noise
levels rising quickly. I need to test the concept first before
stating much more here.
So, what have I been doing
all break you might be asking? Well, for one I've been working
to help pay for my education. After that, I've been spending my
evenings tinkering on my thesis circuits. I figured it was more
important to make progress in that area rather than spending the
time telling you that I wish I had time to make progress. :) My
listing of parts and a few of the flow charts are out of date
now, but they will be updated as I get the time. A few of the
major changes to date are:
- Each module will have its own sampling rate rather than defining
a common rate for the whole bank of modules.
- There will now only be 2 banks of input modules. The reason
for this? I figure that if 64 inputs isn't enough data to sort
through then nothing will be. Also having a total of 4 banks
of 32 modules tends to take up quite a bit of space. I'm not
planning on using my motherboard enclosure as an air-foil anytime
in the near future.
- As you may have wondered, "Ashleigh" has been promoted
from a "daughter board" to a "motherboard"
since that is essentially what she is. I will use "Module"
and "Daughter Card" interchangeably from this point
on so hopefully that confusion is put to rest.
- Relays will NOT be present on the discrete output
board. The reason for this is once you line up 8 of them, they
tend to take up lots of space. After considering the pros &
cons of the decision I choose the middle ground that should account
for about 90% of the the team's requirements. I'll use Darlington
arrays that can sink around 100 mA for each of the 8 outputs.
The whole thing fits on an 18-pin DIP and the price was right.
If heftier switching is required this same module can be used
to energize relay contacts that can be mounted outside of the
motherboard enclosure. This concept prevents any of the motherboard
power supply rails from having to be placed external to the enclosure
hopefully reducing that potential noise source.
- There will be buffers on the motherboard that will protect
it from "hot swapping" modules. I added this as a precaution
to those future freshmen or even sleeping grad students (myself
included) from frying Ashleigh. Any and all methods are being
taken to reduce the "idiot" factor in this project.
- I have decided to add the capability of a LCD (Liquid Crystal
Display) and keypad to the project. The LCD is extremely sensitive
to shock or heavy vibration and I have been reluctant to use
it up until this point. There will be a port on the CPU enclosure
where a cable can be connected to an external handheld plastic
enclosure. This will house the LCD and keypad and will be hot
plugable as well. One of the lines in the cable will be a sensing
line the CPU will use to determine the presence of the unit.
Once detected, the keypad code module will be enabled and the
LCD display will be initialized and start to display data. The
power for the user I/O box will be supplied by the CPU box.
- All modules are going to run on only 5 V rather than a split
15 V for analog and 5 V for digital. This will reduce the complexity
of the wiring and power supply circuitry as well as gain a bit
more space.
- I plan to use 2 Megs of SRAM for storage of the data. This
combined with only having 64 inputs should allow for "plenty"
of storage time. Using semi-fast sampling rates will still allow
data to be accumulated for over 45 minutes. Hopefully this is
sufficient for everyone's needs. As the saying goes, "If
you don't like it... become a grad student and make your own."
- I got measured for a fresh brain the other day because my
old one is currently being held in a rubber-room.
Those are a few of the major
decisions that have been made in the past month. I'm in the middle
of gathering info on the current requirements of each of the module
circuits. This will help me better gauge what size power supply
to juice Ashleigh with. The A/Ds and the linear optos have been
tested and perform flawlessly. The DC-DC converters are a bit
noisy, but hey, what in that car isn't? I can filter most of it
out, so I don't see a problem at this point in that area. As I
get free time, I will change the pages to reflect the changes
that are mentioned above. In case I don't see you before, "Happy
New Year!"
Hmm. I know what you are
thinking. You are thinking, "Hey! Where is this John Clabaugh
character? He never updates his web page. He must just sit around
and watch TV all day." The sad truth is I just sit around
and do homework all the time. Yes, it does get old, but hey..
Somebody has to do it. Once I get home for Christmas break, expect
to see updates more often as I will be making hay. I am planning
to get the hardware bread boarded and tested as well as getting
the core of the software done.
Well, I survived the crazy
weekend here at OU unscathed and even have something to show for
myself. I've completed the flow diagrams for the output modules
and will continue working on the circuit diagrams during the remainder
of the week. I am working on how my project will interface with
the controllers and assist in the current limiting. I'll post
my initial ideas and thoughts after I get my ducks in a row. Believe
me, the line of ducks seems to be infinite at this point.
This evening I had a chance
to get some work done on the daughter board flow charts. I also
put up a brief description of the input and output portions of
the design. This portion of the project is still a bit fluid,
so it may be a while until the schematics are posted, but this
will get the ball rolling in the right direction. As promised
earlier, the output modules will be posted probably early next
week depending on the amount of free time this weekend. By the
way Happy Halloween!
Today I added brief descriptions
to the input modules and started working on more involved descriptions
of the circuits. I have tests and homework all week, so this will
be slow going for the next few days. Later I will add the output
modules to the page which should then free me up to start defining
the daughter board a bit better.
It's been a few days since
any new activities have occurred on site due to homework, tests
and the occasional nap, but this has changed for the time being.
A couple counters have been added to the main page. One is a general
counter that tracks overall page usage. The second counts each
individual's hit count. The next change is some modifications
to a few of the input module circuits. So, sit back and enjoy
the new enhancements.
Created the links page and
filled it with applications and products that I use daily which
provide for my life's fulfillness. Well... At least they make
the day go by easier. Anyhow, if you have a few moments please
stop by their respective sites and check them out.
Howdy and welcome to the
first news entry of the site. As new items and pages are added
to the site in general I'll comment about them here. Also, as
things in my world change I'll probably comment on them as well.
Bet you can't wait. I know I can hardly contain myself.
Copyright © 1999 John Clabaugh